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Plasma dicing is an emerging semiconductor back-end fabrication process that offers several advantages over blade and laser dicing. These include increased throughput, low-temperature etching and debris-free die singulation.

Plasma dicing also offers improved break strength over blade or laser singulated die. This gain in mechanical integrity is particularly appealing for devices that experience physical stresses, such as hybrid bonding stacks used for high bandwidth memory (HBM).


Plasma dicing is becoming increasingly popular in semiconductor packaging. Its cost-effectiveness is due in part to its non-contact, low-temperature, and low-stress nature, as well as its ability to etch all the dicing lanes simultaneously without damage.

In contrast, blade dicing and laser dicing are serial processes. In the case of laser, multiple passes may be necessary. This means that a larger number of dies are required per wafer and that the process is more costly, as more time is spent on removing the silicon. In addition, laser dicing requires higher power and lower speeds to avoid damage, which reduces throughput.

Moreover, the use of blade dicing or laser dicing can lead to chipping and breakage. This can be a major concern in the semiconductor industry, especially as thinner wafers and smaller die sizes become more common.

With this in mind, the need for a non-contact and non-damaging dicing method is crucial to the development of semiconductor packaging technologies. In addition, as the demand for thinner wafers and thinner die sizes grows, it is critical to find a technology that can handle these challenges while also being more cost-effective.

Increased Throughput

Dicing for semiconductor packaging is a critical step that transforms a wafer into individual chips or die. Traditionally, a saw blade or laser is used to cut the wafer along the areas between the chips called dicing lanes. This process separates the chips and makes them ready to be packaged and fitted to whichever device they will end up in.

The traditional dicing method for silicon wafers is mechanical dicing, also known as blade dicing, or saw dicing. It is a common dicing technique for all sizes of devices, such as memory, logic, MEMS and RFID chips. It has several advantages for die singulation, including reducing dicing street widths, providing flexible chip layouts, and eliminating sidewall damage, chipping and wafer breakage.

However, mechanical dicing has some limitations as well. For example, it can be costly to implement. In addition, it may not be suitable for certain substrates or chip structures.

Plasma dicing is a new dicing technique that offers many benefits for die singulation, including reducing dicting street widths and allowing for flexible chip layouts. In addition, it eliminates sidewall damage and chipping that can occur when using mechanical dicing techniques.

In contrast, plasma dicing can be achieved with significantly higher throughput and lower cost. This is because it does not require as many dicing lanes, which can reduce the number of die per line. This frees up additional wafer real estate for circuitry that can be allocated to more active die.

Plasma dicing also provides more die per gram of wafer than other dicing techniques, including sawing and laser dicing. This increases the value of the wafer and, therefore, improves the bottom line for the manufacturer. This is especially important for low-k devices that are being designed with a reduced production volume and cost in mind.

Increased Die Yield

During the dicing process, die are separated into individual chips or dice. This method of harvesting dice is commonly used in semiconductor devices and can be achieved through a number of different techniques.

Laser dicing is a traditional technique for dicing semiconductor wafers, utilizing a laser to dig out silicon debris from the surface of a wafer. This can be done by either a pulsed or continuous wave laser depending on the desired beam intensity and cut pattern. Water cooling is often used to help protect the wafer from thermal damage that can occur during the dicing operation.

Blade dicing is another common method for cutting semiconductor wafers into dice. This method uses a specialized blade to dig out silicon debris from the surface of the wafer.

Plasma dicing offers several advantages over other methods of dicing semiconductor wafers, including increased die yield and lower stress levels. This is because plasma dicing doesn’t leave any mechanically damaged zones or heat affected areas on the die, as blade or ablation dicing does.

This can be important for devices with high-performance functions, such as hybrid bonding stacks that may experience physical stresses in service. These benefits can be realized by limiting top and backside chip-out during dicing, narrowing dicing streets to increase the number of die per wafer, and using an angled sidewall for the dicing street to minimize stress.

The use of a vacuum processing chamber can reduce dicing time and improve the efficiency of a plasma dicing system, as can eliminating air bubbles between the dicing tape and wafer during the process. Bubbles can cause arcing during the dicing process, which is undesirable and can result in a hole being burned through the die.

Better Die Quality

The future of semiconductor packaging is increasingly being influenced by trends toward thinner wafers, lower die sizes, and the use of materials that have smaller relative dielectric constants (low-k materials). These technologies are driving the need for new dicing techniques to separate the wafer into chips without damaging the silicon substrate.

Plasma dicing can achieve better die quality because it does not generate molten debris or processing particles that can damage the silicon substrate. In addition, it does not create a high-temperature environment that can damage the silicon wafer and cause arcing.

Compared with the traditional dicing methods, plasma dicing has a significantly higher throughput and die quality. This can result in increased device reliability, higher production rates, and lower production costs.

Additionally, these processes can leave a flux residue on the metal bumps or pads that is difficult to remove. This residue can adversely affect bonding processes and may even lead to a reduction in package reliability.

Finally, these processes can also be damaging to the surface of the silicon wafer due to oxidation that can occur during the formation of bumps or pads. In particular, oxidation on these surfaces can negatively affect the performance of thermal compression bonding processes that are used to join metal ICs to other devices.

One method that can prevent oxidization of the metal bumps or pads is to clean these areas after dying singulation with a thin mask layer. This can eliminate the need for a flux removal step or an additional plasma etching process, which can save time and money.


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