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Prodigy ProtoBridge

An FPGA-Assisted Verification Tool FPGA-based prototypes closely resemble final silicon chips in speed and accuracy, providing significant value

Prodigy
Prodigy
5 min read

An FPGA-Assisted Verification Tool

 

FPGA-based prototypes closely resemble final silicon chips in speed and accuracy, providing significant value in full-chip validation and early transaction management software development. Realizing these benefits has historically been met with the need to build additional prototyping hardware with significant resources and specialized expertise having to be employed to obtain the necessary FPGA connectivity.

 

The unique Prodigy ProtoBridge AXI FPGA-Assisted Verification Tool uses the widely adopted AXI-4 bus protocol to link transaction coordinator software running on host PC to the FPGA-based prototyping environment. The result of Host DUT connectivity is a high-throughput channel that allows for the transfer of large amounts of transaction-level data between the FPGA(s) and a host computer.

 

Features of Prodigy Proto Bridge

 

AXI-4 transaction-level interconnection module and Master/Slave interfaces for FPGA integration

 

A set of C-API function calls to perform AXI bus transactions in the host computer

 

PCIe3 driver for Linux or Windows operating systems to control Logic Module operations

 

C-API reference operations with sample access to FPGA internal memory

 

System integration guide to connect user RTL code with the ProtoBridge AXI-4 bus module

 

Benefits & Specifications of Prodigy ProtoBridge

Benefits Specifications

Technology

Early IP Verification without the complete SoC design

 

IP blocks connected to the AXI bus can be verified without processor cores or peripheral blocks

 

Early algorithm/architectural exploration can be performed on the FPGA while taking advantage of the FPGA environment's speed performance

 

Shorten Design Verification Time with a high-throughput channel

 

Transaction-level verification is utilized to ensure system-level result accuracy

 

C-code is used as a stimulus to reduce the time and effort in creating RTL test benches

 

Achieve High Product Reliability with improved test coverage

 

Create corner test cases in software and run exercises on an FPGA-based prototype

 

Run high-performance regression tests on an FPGA-based prototype with vectors stored in host computers

 

Business

Eliminate Resource & Expertise Constraints by removing the need for the creation of additional specialized hardware and software

 

Prodigy ProtoBridge Reuse Across Multiple Projects as the flexibility of Prodigy ProtoBridge makes it ideal for any design

 

AXI-4 Bus Protocol Between Host PC and FPGA

 

Instantiation of AXI-4, AXI4-Lite, AXI-3 and AHB bus connections on FPGA ports

 

Configurable data width from 32-bit to 1024-bit

 

Support for an independent clock for each Master/Slave instance

 

Exercise of Large Amounts of Verification Data at High Speed

 

Transmission through 8-lane PCIe Gen3 between Host PC and FPGA

 

Massive data transfer from Host PC to FPGA up to 4000 MB/s

 

Support for direct and DMA access modes

 

Rich Coverage of C Function Calls Between Host PC and FPGA

 

System initialization function calls to manage the tool environment

 

Interrupt control function calls to identify the source of an interrupt signal for C-API's follow-up actions

 

Data read/write function calls to communicate with and operate the FPGA circuit

 

DMA transfer function calls to perform DMA operations for large amounts of data

 

Get World-Class Support to help design teams with any issues that arise-something not available with in-house solutions leaving design teams to fend for themselves

 

For more information about soc verification and functional verification, please feel free to contact us!

Prodigy ProtoBridge

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